Our lab focuses on the design and analysis of advanced communication and computing systems. Key research areas include error correction codes, distributed computing, IoT network optimization, and hardware acceleration.
We investigate high-performance distributed computing architectures. Our recent work focuses on accelerating erasure coding operations by exploiting multiple repair paths and optimizing data allocation in heterogeneous environments.
Design of advanced error correction codes for modern memory systems and wireless communications. We are developing new constructions of Locally Repairable Codes (LRC) and LDPC codes resilient to burst errors and silent data corruption.
Design and optimization of IoT network protocols for energy-efficient and reliable communication. Our recent work focuses on improved analysis and design of Adaptive Data Rate (ADR) algorithms for LoRaWAN systems, enabling dynamic resource allocation that maximizes network lifetime while maintaining quality of service.
Accelerating data-intensive algorithms using GPUs and FPGAs for large-scale data processing. Recent projects include boosting GPU-based frequent itemset mining (GMiner++) by reducing redundant computations, and implementing efficient hardware architectures for post-quantum cryptography candidates.